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Research Article |

ASIC Implementation of DMA Controller

Author(s): Aman Agarwal*, Arjun J Anil, Rahul Nair and K. Sivasankaran

Published In : International Journal of Electrical and Electronics Research (IJEER)        Volume 4, Issue 1

Publisher : FOREX Publication

Published : 30 march 2016

e-ISSN : 2347-470X

Page(s) : 1-4

DOI: https://doi.org/10.37391/IJEER.040101

Abstract

Direct Memory Access is a method of transferring data between peripherals and memory without using the CPU. It is designed to improve system performance by allowing external devices to directly transfer information from the system memory. We generally use asynchronous type of DMA as they respond directly to input. The DMA controller issues signals to the peripheral device and main memory to execute read and write commands. In this paper DMA controller was designed using Verilog HDL and simulated in Cadence NC Launch. The design was synthesized using low power constraints. Through this design we have decreased the power consumption to 69%

Keywords: Direct Memory Access, Asynchronous, Synchronous, MIPS, TSMC.




Aman Agarwal*, School of Electronics Engineering, VIT University, Vellore, India; Email: aman.agrawal01@gmail.com

Arjun J Anil, School of Electronics Engineering, VIT University, Vellore, India; Email: arjun44anil@gmail.com

Rahul Nair, School of Electronics Engineering VIT University, Vellore, India; Email: rahulnair.nair9@gmail.com

K. Sivasankaran, School of Electronics Engineering VIT University, Vellore, India; Email: ksivasankaran@vit.ac.in

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Aman Agarwal, Arjun J Anil, Rahul Nair and K. Sivasankaran (2016), ASIC Implementation of DMA Controller. IJEER 4(1), 1-4. DOI: 10.37391/IJEER.040101.