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Research Article |

VLSI Implementation of Hybrid Memristor Based Logic Gates

Author(s): Ritesh Samanta, Namburi VamsiKrishna, Poongundran Selvaprabhu, Rajeshkumar V and Vetriveeran Rajamani*

Published In : International Journal of Electrical and Electronics Research (IJEER)        Volume 11, Issue 3

Publisher : FOREX Publication

Published : 20 September 2023

e-ISSN : 2347-470X

Page(s) : 733-737

DOI: https://doi.org/10.37391/ijeer.110314

Abstract

Practical memristors have gained attention from researchers and scientists due to their potential use in a variety of electronic circuits and devices. In our paper, a hybrid Memristor-CMOS (MeMOS) logic circuit was designed and its transient response was analyzed. This circuit, which uses a N-type metal oxide semiconductor (NMOS), and P-type metal oxide semiconductor (PMOS) transistors, Operational amplifiers (OPAMPs), resistors, capacitors and multipliers replicate memristor characteristics. To facilitate the development of real memristor circuit applications, a memristor emulator is utilized for breadboard experiments. This emulator can be connected in a variety of configurations, including serial, parallel, or a combination of both, with identical or opposite polarities. By simply changing the connection, the emulator can be switched between decremental and incremental configurations. In our paper, we implemented AND logic using MeMOS. PSpice simulation of the proposed emulator have been demonstrated for TiO2 memristor model.

Keywords: Keywords Memristor-CMOS (MeMOS) Logic, Incremental, Decremental, Incremental Configuration, memristor based boolean logic, off the shelf components.




Ritesh Samanta, School of Electronics Engineering, Vellore Institute of Technology, Vellore, India; Email: ritesh.samanta2022@vitstudent.ac.in

Namburi VamsiKrishna, School of Electronics Engineering, Vellore Institute of Technology, Vellore, India; Email: namburi.v2022@vitstudent.ac.in

Poongundran Selvaprabhu, School of Electronics Engineering, Vellore Institute of Technology, Vellore, India; Email: poongundran.selvaprabhu@vit.ac.in

Rajeshkumar V, School of Electronics Engineering, Vellore Institute of Technology, Vellore, India; Email: rajeshkumar.v@vit.ac.in

Vetriveeran Rajamani*, School of Electronics Engineering, Vellore Institute of Technology, Vellore, India; Email: vetriveeran.r@vit.ac.in

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Ritesh Samanta, Namburi VamsiKrishna, Poongundran Selvaprabhu, Rajeshkumar V and Vetriveeran Rajamani (2023), VLSI Implementation of Hybrid Memristor Based Logic Gates. IJEER 11(3), 733-737. DOI: 10.37391/ijeer.110314.