Research Article | ![]()
Approximate Computing Using Voltage Over Scaling Technique for Image Compression
Author(s): Junqi Huang1*, T. Nandha Kumar2, and Haider A. F. Almurib3
Published In : International Journal of Electrical and Electronics Research (IJEER) Volume 13, Issue 4
Publisher : FOREX Publication
Published : 10 December 2025
e-ISSN : 2347-470X
Page(s) : 686-696
Abstract
Approximate computing has extensively been adopted as a fault-tolerant method to achieve energy-efficient designs in image processing. This paper introduces a novel, integrated approximate approach for implementing runtime-based voltage over scaling (VOS) at both the circuit and algorithmic levels, specifically for approximate discrete cosine transform (ADCT) and zigzag low-complexity approximate DCT (ZLCADCT) in image compression. In the proposed VOS scheme, the supply voltage of exact and approximate adder cells is reduced below the nominal level, causing the output delay to surpass the worst-case delay and generating errors in addition, while lowering energy consumption. A mathematical model applicable to both exact and approximate adder cells using VOS is first presented. The results from this model align closely with simulation outcomes, validating its accuracy. Subsequently, an exhaustive simulation of 4-bit and 8-bit subtraction, followed by ADCT and ZLCADCT, is conducted using VOS. The error rate (ER) normalized mean error distance (NMED) and mean relative error distance (MRED) for the subtractor with approximate cells are significantly lower than those for the subtractor with exact cells under VOS conditions. In ADCT, approximate full adders can operate at lower supply voltages (around 0.77V) than exact full adders (around 0.83V) without a significant loss in Peak Signal-to-Noise Ratio (PSNR). As the number of approximate bits (NAB) increases, the total energy dissipation of ADCT decreases by 33.2%, with an additional 20% reduction achieved through the application of ZLCADCT with VOS.
Keywords: Approximate Computing, Voltage Over-Scaling, Approximate Full Adder, Subtractor, Approximate DCT.
Junqi Huang*, University of Nottingham Malaysia, Semenyih, 43500, Malaysia; Email: huangjunqi@xmut.edu.cn
T. Nandha Kumar, University of Nottingham Malaysia, Semenyih, 43500, Malaysia
Haider A. F. Almurib, University of Nottingham Malaysia, Semenyih, 43500, Malaysia
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