I. J. of Electrical & Electronics Research
Research Article | 
Low-Power VLSI Implementation of Novel Hybrid Adaptive Variable-Rate and Recursive Systematic Convolutional Encoder for Resource Constrained Wireless Communication Systems
Author(s) : Dasari Ramanna1 and V. Ganesan2
Published In : International Journal of Electrical and Electronics Research (IJEER) Volume 10, Issue 3
Publisher : FOREX Publication
Published : 30 August 2022
e-ISSN : 2347-470X
Page(s) : 523-528
Abstract
In the modern wireless communication system, digital technology has tremendous growth, and all the communication channels are slowly moving towards digital form. Wireless communication has to provide the reliable and efficient transfer of information between transmitter and receiver over a wireless channel. The channel coding technique is the best practical approach to delivering reliable communication for the end-users. Many conventional encoder and decoder units are used as error detection and correction codes in the digital communication system to overcome the multiple transient errors. The proposed convolutional encoder consists of both Recursive Systematic Convolutional (RSC) Encoder and Adaptive Variable-Rate Convolutional (AVRC) encoder. Adaptive Variable-Rate Convolutional encoder improves the bit error rate performance and is more suitable for a power-constrained wireless system to transfer the data. Recursive Systematic Convolutional encoder also reduces the bit error rate and improves the throughput by employing the trellis termination strategy. Here, AVRC encoder ultimately acquires the channel state information and feeds the data into a fixed rate convolutional encoder and rate adaptor followed by a buffer device. A hybrid encoder combines the AVRC encoder and RSC encoder output serially and parallel, producing the solid encoded data for the modulator in the communication system. A modified turbo code is also obtained by placing interleaver between the two encoder units and building the stronger code word for the system. Finally, the conventional encoder system is compared and analyzed with the proposed method regarding the number of LUT’s, gates, clock cycle, slices, area, power, bit error rate, and throughput.
Keywords: Recursive Systematic Convolutional encoder, Adaptive Systematic Convolutional encoder, Throughput, Bit Error Rate, Turbo code, Interleaver, Trellis termination strategy
Dasari Ramanna, Research Scholar, Dept. of ECE, Sathyabama institute of science and Technology, Chennai, Tamilnadu, India
V. Ganesan, Associate Professor, Dept. of ECE, Bharath Institute of Higher Education and Research, Chennai, Tamilnadu, India; Email: vganesh1711@gmail.com
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Dasari Ramanna and V. Ganesan (2022), Low-Power VLSI Implementation of Novel Hybrid Adaptive Variable-Rate and Recursive Systematic Convolutional Encoder for Resource Constrained Wireless Communication Systems. IJEER 10(3), 523-528. DOI: 10.37391/IJEER.100320.