f Design a Merging Technique Circuit to Error Detection and Correction Based on Hamming Code and Checksum Using VHDL
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Research Article |

Design a Merging Technique Circuit to Error Detection and Correction Based on Hamming Code and Checksum Using VHDL

Author(s): Mohammed Sami Mohammed, Hanan Badeea Ahmed, Yasir Ghazi Rashid, and Adham Hadi Saleh*

Published In : International Journal of Electrical and Electronics Research (IJEER)        Volume 12, Issue 4

Publisher : FOREX Publication

Published : 30 December 2024

e-ISSN : 2347-470X

Page(s) : 1449-1460

DOI: https://doi.org/10.37391/IJEER.120439

Abstract

Particularly when considering the Internet, recent developments in communication networks have resulted in considerable rises in both the amount of information transmitted and the user base. Errors frequently occur during transmission and reception of this spike in data transfer, which includes phone, video, and message connections. This work proposes a novel approach to error repair and detection through the combination of two well-known techniques: checksum and Hamming code. This combined strategy minimizes the drawbacks of each technique while leveraging its advantages. Even with single-bit errors, Checksum techniques can cause delays and decreased bandwidth efficiency because they require retransmitting data. Nevertheless, they are effective at detecting the existence of errors. However, when multiple-bit faults arise, hamming codes are ineffective at identifying and fixing single-bit problems. The suggested system offers complete mistake detection and correction capabilities by integrating these two approaches. To be more precise, it guarantees the detection of single- and multiple-bit errors and permits the rectification of straightforward faults without requiring retransmission. This strategy was put into practice by using VHDL on an FPGA platform to develop and simulate transmitter and receiver circuitry in addition to be applied by Python to demonstrate these results. The effectiveness of the combined strategy in improving data integrity and transmission reliability is demonstrated by the successful integration of checksum techniques and Hamming codes within the FPGA architecture.

Keywords: Hamming code, Checksum, VHDL, Error Detection, Error Correction.




Mohammed Sami Mohammed, Department of Computer, University of Diyala, 32001 Diyala, Iraq

Hanan Badeea Ahmed, Department of Electronic Engineering, University of Diyala, 32001 Diyala, Iraq

Yasir Ghazi Rashid, Department of Electrical Power and Machines, University of Diyala, 32001 Diyala, Iraq

Adham Hadi Saleh*, Department of Electronic Engineering, University of Diyala, 32001 Diyala, Iraq; Email: adham.hadi@yahoo.com

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Mohammed Sami Mohammed, Hanan Badeea Ahmed, Yasir Ghazi Rashid, Adham Hadi Saleh (2024), Design a Merging Technique Circuit to Error Detection and Correction Based on Hamming Code and Checksum Using VHDL. IJEER 12(4), 1449-1460. DOI: 10.37391/ijeer.120439.