Comparative Analysis of Low Power and Low Leakage Reduction for Logic Circuits
ABSTRACT
As technology scales in nanometer regime leakage current are becoming important metric of comparable importance to leakage current for the analysis and design of complex logic circuits. In this paper, we did the comparative analysis of leakage current for carry look ahead logic circuits. The simulation results depicts that the proposed design leads to efficient in terms of standby leakage power. We have performed simulations using Cadence Spectre 90nm standard CMOS technology at room temperature with supply voltage of 1V.
Keywords:- Low Power, Low Leakage, Leakage Power, Power Gating.
Author(s):Vikas Agarwal, Shweta Agrawal